#vhdl (14 Repositories)
Ranked open-source repositories tagged with #vhdl, scored by pull request acceptance likelihood and maintainer engagement velocity.
59.8%
32.2h
14 repositories tagged #vhdl
siliconcompiler/siliconcompiler
Modular hardware build system
clash-lang/clash-compiler
Haskell to VHDL/Verilog/SystemVerilog compiler
cocotb/cocotb
cocotb: Python-based chip (RTL) verification
FPGA-Research/FABulous
An easy-to-use, silicon-proven (e)FPGA generator with an integrated CAD toolchain 🏗️
ghdl/ghdl
VHDL 2008/93/87 simulator
SpinalHDL/SpinalHDL
Scala based HDL
hdl/awesome
A curated list of awesome resources for HDL design and verification
SpinalHDL/VexRiscv
A FPGA friendly 32 bit RISC-V CPU implementation
nickg/nvc
VHDL compiler and simulator
lcapossio/fpgacapZero
fcapz: Open-source, vendor-agnostic full-featured FPGA debug cores. Embedded Logic analyzer, Embedded I/O and Embedded JTAG-AXI
VHDL-LS/rust_hdl
A fast VHDL language server and analysis library written in Rust
JulianKemmerer/PipelineC
PypelineC: A hardware description language (HDL) adding high level synthesis(HLS)-like automatic pipelining as a language construct/compiler feature.
Nic30/hdlConvertor
Fast Verilog/VHDL parser preprocessor and code generator for C++/Python based on ANTLR4
olofk/fusesoc
Package manager and build abstraction tool for FPGA/ASIC development