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#chisel (15 Repositories)

Ranked open-source repositories tagged with #chisel, scored by pull request acceptance likelihood and maintainer engagement velocity.

Topic Avg Merge Rate

16.8%

Avg Review Latency

28.4h

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15 repositories tagged #chisel

A TierScala 4.8k

chipsalliance/chisel

Chisel: A Modern Hardware Design Language

82.2%
Merge Rate
11h
First Review
100%
1st-Timers
11
Maintainers
B TierScala 7.2k

OpenXiangShan/XiangShan

Open-source high-performance RISC-V processor

64.9%
Merge Rate
3d
First Review
40%
1st-Timers
37
Maintainers
B TierScala 2.2k

riscv-boom/riscv-boom

SonicBOOM: The Berkeley Out-of-Order Machine

40.0%
Merge Rate
4d
First Review
50%
1st-Timers
3
Maintainers
C TierScala 2.4k

ucb-bar/chipyard

An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more

50.0%
Merge Rate
9d
First Review
67%
1st-Timers
4
Maintainers
C TierScala 3.8k

chipsalliance/rocket-chip

Rocket Chip Generator

15.4%
Merge Rate
1d
First Review
50%
1st-Timers
2
Maintainers
D TierScala 619

ucb-bar/riscv-mini

Simple RISC-V 3-stage Pipeline in Chisel

0.0%
Merge Rate
-
First Review
0%
1st-Timers
0
Maintainers
D TierScala 233

ucb-bar/constellation

A Chisel RTL generator for network-on-chip interconnects

0.0%
Merge Rate
-
First Review
0%
1st-Timers
0
Maintainers
D TierScala 123

freechipsproject/diagrammer

Provides dot visualizations of chisel/firrtl circuits

0.0%
Merge Rate
-
First Review
0%
1st-Timers
0
Maintainers
D TierScala 234

ucb-bar/chiseltest

The batteries-included testing and formal verification library for Chisel-based RTL designs.

0.0%
Merge Rate
-
First Review
0%
1st-Timers
0
Maintainers
D TierScala 163

chiselverify/chiselverify

A dynamic verification library for Chisel.

0.0%
Merge Rate
-
First Review
0%
1st-Timers
0
Maintainers
D TierScala 108

carlosedp/chiselv

A RISC-V Core (RV32I) written in Chisel HDL

0.0%
Merge Rate
-
First Review
0%
1st-Timers
0
Maintainers
D TierScala 195

ucsc-vama/essent

high-performance RTL simulator

0.0%
Merge Rate
-
First Review
0%
1st-Timers
0
Maintainers
D TierScala 224

bu-icsg/dana

Dynamically Allocated Neural Network Accelerator for the RISC-V Rocket Microprocessor in Chisel

0.0%
Merge Rate
-
First Review
0%
1st-Timers
0
Maintainers
D TierShell 280

opiran-club/pf-tun

All-in-one OPIran scripts

0.0%
Merge Rate
-
First Review
0%
1st-Timers
0
Maintainers
D TierC# 461

m3rcer/Chisel-Strike

A .NET XOR encrypted cobalt strike aggressor implementation for chisel to utilize faster proxy and advanced socks5 capabilities.

0.0%
Merge Rate
-
First Review
0%
1st-Timers
0
Maintainers
Best Chisel Open Source Repositories & C-Rank™ | GetMerged