Top Welcoming Open-Source Verilog Repositories

An Open-source FPGA IP Generator

Amiga Minimig ported to the Tang Nano 20k FPGA

Official GIT archive of 1541 ultimate II sources

Netlist API (and more) for EDA flow development

OpenROAD's unified application implementing an RTL-to-GDS Flow. Documentation at https://openroad.readthedocs.io/en/latest/

OpenROAD's scripts implementing an RTL-to-GDS Flow. Documentation at https://openroad-flow-scripts.readthedocs.io/en/latest/

HDL libraries and projects

A small, light weight, RISC CPU soft core

OpenXuantie - OpenC910 Core

Full-throttle, wire-speed hardware implementation of Wireguard VPN, using low-cost Artix7 FPGA with opensource toolchain. If you seek security and privacy, nothing is private in our codebase. Our door is wide open for backdoor scrutiny, be it related to RTL, embedded, build, bitstream or any other aspect of design and delivery package. Bujrum!

The USRP™ Hardware Driver Repository

Source and Documentation files for USB C Industrial Camera Project, This repo contains PCB boards, FPGA , Camera and USB along with FPGA Firmware and USB Controller Firmware source.

3-stage RV32IMACZb* processor with debug

OpenSTA engine

A minimal Linux-capable 64-bit RISC-V SoC built around CVA6

FPGA cores compatible with multiple arcade game machines and KiCAD schematics of arcade games. Working on MiSTer FPGA/Analogue Pocket

55nm CMOS Open Source PDK by ICsprout Integrated Circuit Co., Ltd. (ICS55 for short).

Traces, schematics, and general infos about custom chips reverse-engineered from silicon

FM sound source written in Verilog, fully compatible with YM2612, YM3438 (JT12), YM2203 (JT03) and YM2610 (JT10)

An AI accelerator implementation with Xilinx FPGA

The cheapest, clock-accurate FPGA replacement for PPU, created using reverse engineering.

Greyhound on IHP SG13G2 0.13 μm BiCMOS process