MIPI CSI-2 Camera Sensor Receiver verilog HDL implementation For any generic FPGA. Tested with IMX219 on Lattice MachXO3LF. 2Gbps UVC Video Stream Over USB 3.0 with Cypress FX3. This is now Legacy Version!
C-Rank Grade: D (Risky) - 0/100
External PR Merge Rate: -
Response Time: -
First Timer Success: -
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Currently, maintainers of circuitvalley/mipi_csi_receiver_FPGA acknowledge new external contributions in approximately -. Out of all submitted pull requests from non-core authors in the last 180-day window, 0.0% were successfully merged into the primary branch.
circuitvalley/mipi_csi_receiver_FPGA has a recorded first-timer success rate of 0.0%. Repositories ranked Risky typically provide actionable feedback during code reviews and actively nurture new community contributors.
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The C-Rankâ„¢ index scores repositories on a 0 to 100 scale using an objective formula: external PR merge rates, initial response speed, active maintainer count, and first-time contributor retention. A score of 0.0 places circuitvalley/mipi_csi_receiver_FPGA in the Risky tier.
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